Solid-State Circuit Design (SSCD) Lab, IIT Kanpur

-let's talk circuits

At the SSCD group, IIT Kanpur, we work on a diverse set of topics, such as

sensor interfaces
analog-to-digital converters (ADCs)
frequency synthesizers
phase-locked-loops (PLLs) and delay-locked-loops (DLLs)
time-to-digital converters (TDCs)
RF receivers
high-frequency analog filters
neuromorphic computing
hardware security primitives

The research work in IC and in our lab usually flows as follows. After identifying a key research problem, we try to come up with a novel solution (either at the circuit level or at the system level or, both). Following the top-level verification of the idea, we design a prototype integrated circuit and send it for fabrication. A printed circuit board (PCB) is then designed for testing and characterizing the fabricated chip to corroborate the proposed idea with the measured results from the chip! And such a successful chip usually finds its way to a good journal or a conference!

Publications

Journal papers

J. Kaur, S. Saurabh, and S. Sahay, "Muller C-Element Exploiting Programmable Metallization Cell for Bayesian Inference," IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) (accepted).
S. Pal, Shubham Sahay, W. -H. Ki and C. -Y. Tsui, "Soft-Error-Immune SRAM With Multi-Node Upset Recovery for Low-Power Space Applications," IEEE Transactions on Device and Materials Reliability, vol. 22, no. 1, pp. 85-88, March 2022, doi: 10.1109/TDMR.2022.3147864.
R. S. Ashwin Kumar, N. Krishnapura, and P. Banerjee, "Analysis and Design of a Discrete-Time Delta-Sigma Modulator Using a Cascoded Floating-Inverter-Based Dynamic Amplifier," IEEE Journal of Solid-State Circuits (JSSC). (doi:10.1109/JSSC.2022.3171790) (paper)
R. S. Ashwin Kumar and N. Krishnapura, "Multi-channel Analog-to-Digital Conversion Using a Delta-Sigma Modulator Without Reset and a Modulated Sinc-Sum Filter," IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I). (doi: 10.1109/TCSI.2021.3094679). (paper)
Will be presented at the IEEE International Symposium on Integrated Circuits and Systems (ISICAS) 2021.
N. Bajpai, A. Pampori, P. Maity, M. Shah, A. Das, and Y. S. Chauhan, "A Low Noise Power Amplifier MMIC to Mitigate Co-site Interference in 5G Front End Modules", IEEE Access, Vol. 9, pp. 124900-124909, Sept. 2021. (paper)
Chithra, A. Narayanan, R. S. Ashwin Kumar and N. Krishnapura, "Auto-zeroing Static Phase Offset in DLLs using a Digitally Programmable Sensing Circuit", IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 68, no. 6, pp. 1788-1792, June 2021. (paper)
Imon Mondal and Nagendra Krishnapura, “Effects of AC Response Imperfections in True-Time-Delay Lines,” IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS II), vol. 68, no. 4, pp. 1173-1177, April 2021. (paper)
R. S. Ashwin Kumar and N. Krishnapura, "Multi-Channel Analog-to-Digital Conversion Techniques Using a Continuous-time Delta-Sigma Modulator Without Reset," IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 67, no. 11, pp. 3693-3703, Nov. 2020. (paper)
(Also presented at the IEEE International Symposium on Integrated Circuits and Systems (ISICAS) 2020).
Chithra and N. Krishnapura, “A flexible 18-channel multi-hit time-to-digital converter for trigger-based data acquisition systems,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 6, pp. 1892-1901, Jun. 2020, doi: 10.1109/TCSI.2020.2969977.
Shubham Sahay, M. Bavandpour, M. R. Mahmoodi and Dmitri Strukov, "Energy-Efficient Moderate Precision Time-Domain Mixed-Signal Vector-by-Matrix Multiplier Exploiting 1T-1R Array", IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, vol. 6, no. 1, pp. 18-26, June 2020. (paper)

M. Bavandpour, Shubham Sahay, M. R. Mahmoodi and Dmitri Strukov, "Efficient Mixed-Signal Neurocomputing Via Successive Integration and Division", IEEE Transactions on VLSI systems, vol. 28, no. 3, pp. 823-827, Mar. 2020. (paper)
R. S. Ashwin Kumar, D. Behera and N. Krishnapura, "Reset-Free Memoryless Delta–Sigma Analog-to-Digital Conversion," IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol. 65, no. 11, pp. 3651-3661, Nov. 2018, doi: 10.1109/TCSI.2018.2854707. (paper)
(Also presented at the IEEE International Symposium on Integrated Circuits and Systems (ISICAS) 2018.)
Imon Mondal and Nagendra Krishnapura, “Expansion and compression of analog pulses using bandwidth switching of continuous-time filters,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), vol 65, pp. 2703-2714, Feb. 2018. (paper)
Imon Mondal and Nagendra Krishnapura, “A 2 GHz bandwidth, 0.25-1.7 ns true-time-delay element using a variable-order all-pass filter architecture in 0.13 μm CMOS,” IEEE Journal of Solid-State Circuits (IEEE JSSC), vol. 52, no. 8, pp. 2180-2193, Aug. 2017. (paper)

Conference papers

Abhishek Kumar, Shubham Sahay and Imon Mondal, “An Automatic Leakage Compensation Technique for Capacitively Coupled class-AB Operational Amplifiers,” IEEE ISCAS 2023.
Mayank Anupam, Harshit Rathore, and Imon Mondal, “Bandwidth-Enhanced Feedforward Amplifier with Shared Class-AB Gain and Compensation Paths,” IEEE International Symposium on Circuits and Systems (ISCAS) 2022.
R. S. Ashwin Kumar, "Using the Miller Theorem to Analyze Two-Stage Miller-Compensated Opamps", to appear in IEEE International Symposium on Circuits and Systems (ISCAS) 2022.
R. S. Ashwin Kumar, "A Discrete-Time Delta-Sigma Modulator With Relaxed Driving Requirements And Improved Anti-Aliasing", IEEE International Symposium on Circuits and Systems (ISCAS) 2021,
doi: 10.1109/ISCAS51556.2021.9401336. (paper)
Harshit Rathore and Imon Mondal, “Breaking the trade-off between bandwidth and close-in blocker attenuation in an N-path filter,” IEEE International Symposium on Circuits and Systems (ISCAS) 2021. (paper)
Chithra, “A technique for measuring picosecond delays using phase modulation”, IEEE International Symposium on Circuits and Systems (ISCAS), 2021, pp. 1-5, doi: 10.1109/ISCAS51556.2021.9401428.
Imon Mondal, “Analysis and comparison of distortion of Miller and feed-forward opamps in negative feedback,” IEEE International Symposium on Circuits and Systems (IEEE ISCAS), Sevilla, 2020, pp. 1-5, doi: 10.1109/ISCAS45731.2020.9180534. (paper)
R. S. Ashwin Kumar and N. Krishnapura, "A 2-Channel ADC Using a Delta-Sigma Modulator Without Reset and a Modulated-Sinc-Sum Filter", IEEE European Solid-State Circuits Conference (ESSCIRC) 2019, doi: 10.1109/ESSCIRC.2019.8902610. (paper)
Chithra and N. Krishnapura, “Static phase offset reduction technique for delay locked loops,” IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, 2019, pp. 1-5, doi: 10.1109/ISCAS.2019.8702613.
Imon Mondal, “Effect of circuit non-idealities on active on-chip delay lines,” IEEE International Symposium on Circuits and Systems (IEEE ISCAS), Sapporo, Japan, pp. 1-5, May 2019. (paper)
Chithra and N. Krishnapura, “Modeling techniques for faster verification of a time-to-digital converter system-on-chip design,” IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK India), Hyderabad, India, 2019, pp. 1-6, doi: 10.1109/MOS-AK.2019.8902447.
Imon Mondal and Nagendra Krishnapura, “Linearity and gain enhanced wideband transconductor using digitally auto-tuned negative conductance load.” IEEE International Symposium on Circuits and Systems (IEEE ISCAS), Florence, Italy, pp. 1-5, 27-30 May 2018. (paper)
R. S. Ashwin Kumar, D. Behera and N. Krishnapura, "A Low Power Multi-Channel Input Delta-Sigma ADC Without Reset,” IEEE International Conference on VLSI Design and International Conference on Embedded Systems (VLSID) 2017, doi:10.1109/VLSID.2017.85
Imon Mondal and Nagendra Krishnapura, “Gain enhanced high frequency OTA with on-chip tuned negative conductance load,” IEEE International Symposium on Circuits and Systems (IEEE ISCAS), Lisbon, Portugal, pp. 2085-2088, 20-23 May 2015. (paper)
Imon Mondal and Nagendra Krishnapura, “Accurate constant transconductance generation without off-chip components,” 28th International Conference on VLSI Design, Bangalore, India, Jan. 2015. (paper)

Patents filed

Imon Mondal and Nagendra Krishnapura, "Tunable true-time-delay element using a variable order all-pass filter.'' India patent application # 201741014751.
N. Krishnapura, Chithra, A. Narayanan and R. S. A. Kumar, “Static phase offset reduction in DLLs using a digitally programmable sensing circuit,” India patent application #202041057083. (Patent pending).
R. S. Ashwin Kumar and Nagendra Krishnapura, "Multi-Channel ADC Realization Using a Delta-Sigma Modulator Without Reset And a Modulated Sinc-Sum Filter", India patent application # 201941038076.